The present invention relates to a semiconductor integrated circuit device, and more particularly to techniques which are effective when applied to a semiconductor integrated circuit device having copper wiring.
With rises in the operating speed and integration density of an LSI (large-scale integrated circuit), a wiring material of low resistivity and high reliability has been requested. In recent years, as the wiring material which meets these requirements, note has been taken of copper having a resistivity of 1.56 .mu..OMEGA.-cm (refer to, for example, (1) Official Gazette of Japanese Patent Application Laid-open No. 155737/1982, and (2) Preliminary Papers of the 47th Science Lecture Meeting of the Japan Society of Applied Physics, Paper No. 30p-N-12, p. 513, September 1986).
It has been revealed, however, that copper has the property of increasing its resistivity when impurities such as phosphorus (P) and arsenic (As) are contained therein (refer to, for example, (1) Transactions of AIME, 143(1941), 272, (2) Transactions of AIME, 147(1942), 48, (3) Transactions of AIME, 152(1943), 103, and (4) Transactions of AIME, 106(1946), 144).